Significant growth in both high-frequency wired and wireless markets has introduced new opportunities where compound semiconductors such as SiGe have unique advantages over bulk complementary metal oxide semiconductor (CMOS) technology. With the rapid advancement of epitaxial-layer pseudomorphic SiGe deposition processes, epitaxial-base SiGe heterojunction bipolar transistors have been integrated with mainstream advanced CMOS development for wide market acceptance, providing the advantages of SiGe technology for analog and RF circuitry while maintaining the full utilization of the advanced CMOS technology base for digital logic circuitry.
A typical prior art SiGe heterojunction bipolar transistor is shown, for example, in FIG. 1. Specifically, the SiGe heterojunction bipolar transistor shown in FIG. 1 comprises semiconductor substrate 10 of a first conductivity type having sub-collector 14 and collector 16 formed therein. Isolation regions 12, which are also present in the substrate, define the outer boundaries of the bipolar transistor. The bipolar transistor of FIG. 1 further includes SiGe layer 20 formed on a surface of substrate 10 as well as isolation regions 12. The SiGe layer includes polycrystalline Si regions 24 that are formed over the isolation regions and SiGe base region 22 that is formed over the collector and sub-collector regions. The prior art bipolar transistor also includes patterned insulator layer 26 formed on the base region and emitter 28 formed on the patterned insulator layer as well as a surface of SiGe base region 22.
A major problem with prior art SiGe heterojunction bipolar transistors of the type illustrated in FIG. 1 is that during the deposition of the SiGe layer, facet regions (labeled as 30 in FIG. 1) grow at the edges of the SiGe layer between the polycrystalline Si region and the SiGe base region. As shown, the facets form in regions which encroach upon the corner formed between the upper surfaces of substrate 10 and the isolation regions of the structure. The growth of facets near the this corner leads to increased parasitic current leakage as well as shorts which are caused by the presence of excessive dislocations in the structure. Moreover, the presence of facets in a bipolar transistor increases the base resistance of the structure.
In view of the above mentioned problems with prior art heterojunction bipolar transistors, there is still a continued need for developing a new and improved method which is capable of fabricating a heterojunction bipolar transistor in which facet growth is controlled such that the structure will have reduced dislocations and base resistance as well as diminished parasitic leakage.